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HyperLynx  simulation rise time vs datasheet

Question asked by sjamsit on Aug 5, 2015
Latest reply on Dec 5, 2015 by agxinmj

Hi all,

 

I am new to HyperLynx and I a have questions: Currency I am debugging a PCB where we have an FPGA interfacing with ram module. In the attachment I am trying something very basic but I cant seem to get the results I want. I am trying to relate the tdp value in the datasheet for a 3.3 LVTTL driver (low slew 12 mA) to a simulation in HyperLynx. When I do the simulation I get different results. Even after factoring the temperature coefficient in I still do not see the same rise time or output delay that the datasheet suggest in the simulation?

 

1) What am I doing wrong here ?

 

2) Also the termination wizard also suggests 1.183 ns driver transition time which is close to the simulated rise time which also doesn't correlate to any figure in the datasheet ?

 

 

Best regards,

Sam

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