Thanks for the answer, but this project is based on a Keyin netlist.
There is no "Mentor" schematic available.
I generated a jeyin netlist from my schematic and when I look at it I find the %page=TopView!$1I112
(TopView is the schematic name).
There are several lines each representing a schematic page.
You might try changing this name (with your favorite editor) to something you like and see what happens.
I can not try this as I am not in a netlist flow.
I know it's dirty, and there should be an easy way, but ........
I have tried that, but no result.
Compared a DxD .prj file with a Keyin .prj file and changed some keywords in the Keyin .prj file, but also no result.
Also changed some keywords in the .pcb file, but no results either and now the PCB will not load.
I think, if it is possible, you have to manipulate some CES / Layer Stackup .ini files or change / add a keyword(s) in the .prj file.
But, maybe it is not possible at all and do we have to create an idea for it.
@Mentor: Can some tech-guy give an answer about this problem?
Off the top of my head, I am not aware of a way to customize the Layer Stackup print; I think it's a pretty 'canned' output, but we'd have to research this a little to conrfirm. You'd need a current Support contract to do this, but I can only suggest submitting a Service Request so that one of us can research and confirm whether we can offer any suggestions here or whether it would need to be proposed as an enhancement request on the Mentor Ideas site.
I'm sorry not to be able to offer a more helpful answer straight off.