This is likely due to the Mask SVDB Directory CCI option being set while LVS Push Devices YES is in effect (which it is by default).
Two most likely ways to defeat the warning: specify LVS PUSH DEVICES NO or specify Mask SVDB Directory CCI NOPINLOC. Only do the latter if that type of output is satisfactory for your CCI flow.
thanks so much for your reply! You were right, the problem appears when the following option is checked while PEXing: "Outputs->SVDB->Generate Calibre Connectivity Interface data", and goes away if, under that very same option, I enable "Suppress pin-location information" (which has the effect of changing the, in the _calibre.rcx_ file, the entry
"MASK SVDB DIRECTORY "svdb" QUERY XRC"
"MASK SVDB DIRECTORY "svdb" QUERY XRC CCI NOPINLOC".
I still wonder though, what am I actually disabling by choosing the "Suppress pin-location information" option? Is this something accessory to the actual LVS/PEX operation, or it could potentially harm and make invalid my results? The documentation says little beyond the obvious; all I understood is that the CCI data is related for the integration of Calibre with other EDA tools (in particular, Virtuoso, which I am using).
Thanks again for your help.
1 of 1 people found this helpful
The LVS Push Devices section in the SVRF Manual contains a fair amount of detail on the subject of what that statement accomplishes. In particular, the subsection "Situations Preventing Pushdown" discusses what prevents pushdown, which is something Mask SVDB Directory CCI does by default because it triggers PINLOC (this can be overridden by NOPINLOC). The Mask SVDB Directory section of the SVRF Manual discusses the options that various keywords trigger. The bottom line is, device pushdown is incompatible with obtaining pin location information, because pushdown does not preserve where the pin gets recognized when it is promoted.
When you suppress pin location information (which is what LVS Push Devices YES does), you are doing exactly what that implies: no device pin location information is saved in the SVDB. If your parasitic extraction flow requires pin location information, then using PINLOC, however it gets set, is desirable. In this case, you need to know what your parasitic extraction results ought to include. I assume your foundry's process documentation discusses this.
The XRC option does not cause the behavior that CCI does by default. Generally, if you are using XRC as your parasitic extraction tool, you don't need CCI.
Thanks again for you reply, Dan. This clears things a little more, though I confess I'll have to go through the references you mention in order to get it completely (there are many concepts I'm not familiar with yet about the LVS/PEX operations). I'm using xRC for extraction so I guess I can safely live without pin location info in the SVDB.
I really appreciate your help, thanks so much for your time!
1 of 1 people found this helpful
If you were using CCI in your LVS flow to help you find nets and devices with RVE, you can get the same thing to happen in your PEX flow using the Net Summary Report option. When you enable the Net Summary Report, you can highlight layout objects using RVE's Finder tool.
Search for Tech Note MG570825 for details.
Outputs -> Reports -> Net Summary -> Net Summary Report -> my_net_summary.rpt
resulting CalibrePEX deck:
PEX REPORT NETSUMMARY "my_net_summary.rpt" FULL DETAIL SCALE 1 COLUMNS ADVANCED
Thanks for the tip Vern! Object highlighting seems to be working properly even when using with the NOPINLOC option, but it's good to know this alternative way of achieving it using the Finder tool.