1 Reply Latest reply on Nov 18, 2015 6:23 PM by vernon_greer

    net0 in nmPEX


      Hello again! I made a block with 4 pins: VDD, GND, in, out

      When I run nmPEX and I read the netlist, I see it finds capacitances between GND and net0! What is net0? How should I have to interpret it? Let's say I have a capacitance between out and GND, and another one between out and net0: should I have to add those capacitance (thus considering net0=GND)? What about the capacitance between GND and net0, then?

      Thanks for your help!

        • 1. Re: net0 in nmPEX

          I think that net0! is a default imposed by either CalibrePEX or your design kit.


          Now, since you're not posting comands from a Calibre deck, I'm guessing you're using the Calibre GUI. So, go to PEX Options > Netlist > Format. The option right at the top of the tab should be "Ground node name". The tooltip specifically talks about intrinsic capacitances being grounded to that node, so you can pick the one you want instead of net0!.


          If you're using a bulk silicon process, I'd also suggest giving the next option, "Ground layer name" a glance in the Calibre documentation. It turns into PEX GROUND LAYER in the output Calibre deck. It's useful for partioning your extracted intrinsic capacitance between the P substrate and the N-wells.