We have had same problem, creating a starpoint in a circuit.
How we do it is create your resistor in the standard way (size you want), but for the padstacks ensure that they have no solderpaste or soldermask defined.
This will mean that the final result the part is buried under soldermask on the final pcb.
We then create two conductive shapes which are assigned the net of each pad and they then overlap the pad and then each other in the middle of the device.
One thing you may want to consider is on this new cell created put some form of symbol on the silkscreen, so that when you view the finished pcbs it is easy to see why it appears that a resistor has been covered in soldermask.
Attached is couple of pictures from our part to illustrate above.
Star_point.JPG 82.0 KB
but what about the drc comparing to IPC356 the manufecturer will get short between 2 nets
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Yes, it is not a perfect solution.
We get DRC error, but just have to tell manufacturer that it is an intended short.
How we work - we send gerber/fabrication data to manufacturer who look at it and return with any questions that they have, we then investigate these, reply and then they proceed with manufacture.
hopefully sometime in the future Mentor Graphics will enable to define a starpoint which will then get ignored by the drc checks.
its sure a kind of problem which make always a deley in pcb mnufecturing since we have to deal with many qustions of the manufcturer
You can use small pieces of copper with a copper bridge between them. End your routes in the copper areas. No DRC Errors. But very clunky and difficult to work with.
I have created a few shorting parts, but no matter how you do that, you will get an error in DRCs and gerber netlist comparisons. The no mask padstack definition will not work if you let CAM create your mask openings. You can make 0 pads and associate copper across them in the PCB Decal. You can use the CAM.Soldermask.Adjust Attribute with a negative value.
In this case, why bother making a new net for power sense? The chip is just watching the voltage rail, but definition, you want that pin attached to the power net. So just connect VCC to a pin named VSense.
But these workarounds still generate DRC errors. In my opinion they are only crutches. It shouldn't be such a problem to provide a solution for that issue which frequently arises.
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If you use an RF shape for the shorting it won't give you DRC issues. But it requires the RF option license.
Another option is to use the new "Net Shorting" feature added in ... I think ot was VX.1 ( A little uncertain about which version we added this in)
This new feature let you select a pin or a via. Right click and open the padstack properties dialogue. In this dialogue you can define which net that is alowed to short circuit and on which layer.
It requires a pin or a via in the "shorting-location"
Per Viklund, Mentor Graphics
Hello my Frends
I just open a Idea @ the Support Net, if you wish to vote here is the link.
While i do like the new "Net Shorting" Feature, but I am missing something like Back Annotation here. In my opinion all Connectivity Needs to be visible and managed by the tool in the schematic. When you shorten a Net with the New Shorting Net Function, let’s say the +5V and the +5V_2 for example, it would be really nice if you can Back Annotate this connectivity change, back to the schematic. For me it would be good enough when something like this (see below) would be created in the schematic, or even better you can designate a symbol (Starpoint) for this case.
Like I say the "Shorten Net" Feature is nice, but like it is now I can’t really use it.
What do others think about this? Is this no concern to you? I mean that you can't see the conectivity in the schematic, when you shorten a Net?
Best regards and Happy X-mass