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Incorporating the on-package decouling capacitors in PDN impedance analysis

Question asked by binayak on Apr 10, 2016


I am using an IC that has on-package decoupling capacitors. I want to incorporate them PDN ac-impedance analysis. I have contacted the IC vendor, and the vendor has agreed to provide me with an S-parameter file and/or a Z-parameter file (that will model the effects of on-die capacitance, die-to-pkg wire bonding, on-package decaps, pkg inductance, etc.)


I don't have "PDN model export" license add-on. Hence, I want to use the output of distributed decoupling analysis which is a Z-parameter file (that would model the PCB along with on-baoard PCB decoupling capacitors) and keep it in series with the VRM model and my IC model (S-parameter file or Z-parameter file) in Linesim and see the overall PDN impedance profile.


Can someone guide me in the right direction in how to do this? I am sure many would have faced this situation as these days all high end DSPs and FPGAs are coming with on-chip decoupling caps.