It looks like a bug with the checks for 'intra-page' connections and the bus ripper. If you disable the intra-page check in DRC do the errors disappear? From my experiments this appears to be the culprit, can you confirm this?
From the requseter:
1) I disabled the "Report extra internal or flat connection on nets" --> Same errors
2) I disabled the "Duplicate symbols connected on the net" --> Same errors
3) I disabled the "Hierarchical checks" --> Same errors
4) I disabled the "Flat checks" -->Same errors
5) I disabled the "Internal checks" --> No errors
What is going on?
Can you explain it and/or can you confrim this is a bug to be taken care of?
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It is a bug, it seems to have been introduced in VX.1. 'Internal checks' tests the on-sheet (intra-page) connections which is where the error is showing up with the bus ripper.
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I will open a SR for this.
In the mean time, I like to tell my engineers to keep designing like this and live with the bug report.
Thanks for your clarification.
P.S: And if it possible to add the fix in an update to vx1.2 or greater I would be among the happiest people on earth. :-)
P.P.S: there was a poll on how many error do you have after finishing a schematic. With this the number jumps up to thousands in our hierarchical design.
The original issue was picked up in VX.1 and fixed in VX.2 but your use case is subtly different with the repetition of the connectivity. I have logged a defect for it but if you wish to have this back-fitted to VX.1.2 you will have to speak to a support representative and follow their guidelines.