in EE2007.3 you can use "HangerProtection.txt" Side File.
See "Remove hanger" on Expedition help file.
I saw it in what_is_new_2007.3 document. however, it don't work for the scenario where user wish to delete stanalone vias(which connect nothing) but keep stiching vias. For example, one gnd via is standalone which user wanna deleted as floated vias, but keep another gnd via stiching shape in the layer 1 and shape in the layer 2.
Forward Annotation’s option to “Remove floating traces & Vias” uses connectivity to determine if these objects are floating. The problem with stitching vias used between plane shapes is the software at this point does not know these vias have connectivity to physical plane metal because plane net connectivity is an expensive operation performance wise to calculate.
Here are two proposed solutions for this situation:
1) Use the AutoActive command “Remove Hangers” to manage this situation instead of the Forward Annotation option. “Remove Hangers” has access to the full plane connectivity therefore it should not remove plane stitching vias.
2) If you want to use this option for regular nets, lock the stitching vias for plane nets. Forward Annotation will then ignore these vias and then you can use “Remove Hangers” to manage them.
The 2007.3 HangerProtection.txt feature is specific to the situation where interactive routing would clean up trace/via hangers when a from-to connection was completed. Originally this was done to help the user cleanup these situations where a hanger was abandoned for a different path to form connections. It was determined this feature was good for a majority of the cases but there are specific situation where this feature removes unknown design intent. Now with the introduction of this side file, the user can specify specific nets where they will manually manage trace/via hangers.
ExpeditionPCB/XtremePCB Product Marketing Manager
Another is that foward annotating don't automatically delete traces those are not in the revised netlist. Supposing a net A consisting of U1.1 and U1.2 and you routed it in Expeditionpcb, lately you broken the connection between U1.1 and U1.2 in schematics and forwart annotate to Expeditionpcb, you will find the trace (net0)connecting U1.1 and U1.2 still exists in the layout. It's very dangrous in some cases.
Of course, there are some workarounds: Foward annotating with "Fanout single pins..." or check all net0.