0 Replies Latest reply on Oct 31, 2016 1:00 PM by harim70

    How to make a ERC /DRC constraint files from a design and the library



      Any know? how to make ERC/DRC constraints' file for a design in PADS. I am working on a board that consist of almost 1.8V to 30V and I really want to do a good DRC/ERC check for this board before manufacturing. Anybody have any suggestions to make this constraint file to run DRC/ERC?

      please give if you have any good ideas?


      I know I can generate this file in Allegro and Altium but I do not know in PADS.