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How to make a ERC /DRC constraint files from a design and the library

Question asked by harim70 on Oct 31, 2016

hi,

Any know? how to make ERC/DRC constraints' file for a design in PADS. I am working on a board that consist of almost 1.8V to 30V and I really want to do a good DRC/ERC check for this board before manufacturing. Anybody have any suggestions to make this constraint file to run DRC/ERC?

please give if you have any good ideas?

 

I know I can generate this file in Allegro and Altium but I do not know in PADS.

thanks

Hari

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