You can use the same approach I gave you on matching groups. You have them routed. Find the longest pin pair, that is your max length for all. I ussally subtract 0.01mm for minimum length of differential pairs. Now edit each pair to have a min and max length restriction, or group if their in a group. Tune or optimize till they all match. You may have to spread traces around for pairs for auto tune to work. Then go back and retune area around them. I have never tried tuning to closer match than that, but you could try putting same number as min and max limits. PADS router is pretty good at stretching a routed trace to min length. Better than routing that same trace to restricted length. When using the matching length checkbox. it keeps growing the group.
If this is that same DDR2 project, I think your DQS pair need to match the DQ length for each byte. Those length restriction rules need looked at as well.
Tip You can put a tighter tolerance on pin pair within a group. I use longest -0.10mm for min on group. DQS pair min and max must fall within byte group min and max or will show as a error and not tune.
Hope this helps.
I was able to get the diff pairs to within 0.033mm. I ended up stretching one of the traces slightly to get the added length. It did change the impedance slightly by adding gap to the traces but very little.
Thanks again for your help in routing DDR3.