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Unroll compound signals in TCL/Modelsim (eg.: VHDL records)

Question asked by on Jan 19, 2017
Latest reply on Jan 19, 2017 by Community_Admin

Just wonder how to examine all subelements of a VHDL record when I don't know the attribute names.

One could parse the output of describe <signal_name> to get the attributes/subelements but maybe there is a better way.

I  want to inject a bitflip in a random in a random bit among all signals, using the force command.