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LVDS signal mismatch length

Question asked by expertengr on Mar 14, 2017
Latest reply on Mar 14, 2017 by jeff@viavi

I have defined LVDS signals in Constraint Manager and routed LVDS pair from chip to connector but there is some mismatch in length of positive and negative signal. When I do tuning it applies to both signals and as a result only one signal achieve target length and other signal still have mismatch in length as before. Is it possible to apply tuning to only one signal (not both) ? 

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