How to add break-out trace through scripting?
You need to be more specific. There is already a Fanout command (F2 in route mode) that does a simple breakout. But there are many more things to consider.
- Do you want it for simple parts like 2-pin chips, or for any part regardless of complexity or pin count.
- Surface layers or vias and internal layers.
- What parameters will govern the breakout? For QFN & QFP & SOIC, do you want to go external only or is breakout to the inside of the pads ok?
- Open connections can go in all directions. Do you want to optimize and prioritize for direction?
- For BGA parts, what parameters? 45° dogbones by quadrant, via in pad under the BGA pads, all one direction (what direction?) ? etc.
You have touched on a very complex subject here, for which there is not a simple answer. There are many simpler problems for which most CAD tool vendors do not have very good solutions, so it will be a long time before this level of problem will be addressed.
If you are at all interested in the fundamental issue, it's prediction. It is hard to know in advance, when placing one object in a particular location, if there will not be some more important object that needs to be placed in that location later on. A human can do a lot of predicting based on experience and the ability to consider many factors simultaneously, in a specific case. But taking that to the next level of creating an algorithm that applies well over an infinite number of scenarios is much more difficult.
In the Route Menu there is a fanout patterns menu. It gives you some more choices than F2.
I personally have written a few fanout pattern scripts for specific use cases but, like Patrick states it is a complex issue. There is a radial fanout for bondpads in AATK as a specific use case example.
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