AnsweredAssumed Answered

What to do for Hatching outline, Hatching void with Copper pour?

Question asked by on Jun 27, 2017
Latest reply on Jul 4, 2017 by



I am working in a board which has 2 layer, but in one layer I wanna place all component.

In this design, I need to use some VIA( for GND, VOUT,VFB,etc)  pad stack, decal name like STANDERD or 0.5*0.2.

Now my question is


1. Within a certain plane are what to do for placing different type of Via?

2. Should I use Mixed plane in "design rule"? Plane area cut-out ?

3. How to use "Hatch" tool ? Should I use copper  board outline ? flood etc?


I got some errors after , verify ( clearance and connectivity) my design as follows,



Isolated subnets for: SW



*** subnet # 1

VIA(15.3,12.9 L1)



*** subnet # 2

VIA(15.5,14.5 L1)



*** subnet # 3

D1.2 L1.2 U1.5 C3.2





Isolated subnets for: VOUT



*** subnet # 1

VIA(9.9,12.4 L1)





Hope you will help me what to do.

I need only 2 layer design, not to separate GND,POWER to other layer .