Anyone that could help me with that?
If there is no connectivity on the device seed layer, it is not possible the pins of the device are shorted through the device body. The short must be occurring through some other layer. From what you show above, there is no connectivity on SN, hence, any pin shorts are not due to the device body itself.
I suggest looking for the "Short Isolation" section of the Calibre Verification User's Manual. Follow the links to the Calibre Interactive manual as needed if you need instructions on how to use short debugging in RVE.
I also suggest running circuit extraction with your Layout Primary set to a cell that contains just enough hierarchy to reproduce the short. Then there's less data to sort through.
From the short isolation output, you should be able to determine which layers are involved, which should give a hint as to how to proceed.