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SN resistor in LVS deck

Question asked by ronaldompotne on Aug 1, 2017
Latest reply on Aug 7, 2017 by dan_liddell

Dear members,


I need to define an SN resistor (no, it is not poly) in my LVS deck.

The question is: How can I provide device connectivity without shorting the pins (POS and NEG) since both terminals are metal1?

If I define the device like this, the terminals will be shorted.

res = SN AND L1 // L1 is just a dummy layer to provide seed recognition

DEVICE R res M1(POS) M1(NEG) (POS NEG) [37]


I also tried to create another dummy layer to make boolean operations on the terminals but the short still remains.

pos_pin = (M1 AND L1) AND L3 // L1 and L3 are dummy layers

CONNECT M1 pos_pin by CT

neg_pin = (M1 AND L1) NOT L3

CONNECT M1 neg_pin by CT

res = SN AND L1

DEVICE R res M1(POS) M1(NEG) (POS NEG) [37]


Below, a screenshot of the device.

Screenshot from 2017-08-01 16-52-35.png




Yellow part is the SN layer, blue is M1 and white inside the blue is CT (contact opening).

Thanks in advance for the help.