2 Replies Latest reply on Sep 25, 2017 5:15 PM by jeffrey

    Should Testpoint have placment outline?

    jeffrey

      This may be a silly questions, but should a testpoint cell have a placement outline?

      I checked the training libraries and the answer seems to be no, but I just wanted to know for sure before I make the change to my cell.

       

      Thanks,

       

      -Jeffrey

        • 1. Re: Should Testpoint have placment outline?
          Vern_Wnek

          Typically, I make my TPs with a placement outline the same size as the pad, just to make sure I can check for interference later. It is not required though.

           

          I also shrink my Ref Des text down to a size that the pad obliterates.

           

          Thanks,

          Vern Wnek, C.I.D.

          Technical Marketing, Xpedition

          8247-3230 or 1-949-790-3230 Office

          714-264-2417 Cell

          Vern_Wnek@Mentor.com<mailto:Vern_Wnek@Mentor.com>

           

          <http://www.mentor.com/pcb/xpedition/>Xpedition® VX - next generation pcb design is here – click the X to learn more.

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          • 2. Re: Should Testpoint have placment outline?
            jeffrey

            Thanks Vern.

             

            That matches what I've been doing.

             

            Where this question stems from is when I try to place them in areas that shouldn't cause an issue, such as just inside the placement outline that is enlarged for rework  around a BGA but outside of the body area, I currently have to accept them.  Obviously having the testpoint there won't cause a rework issue nor a placement issue, but it prompted me to ponder the "best practice" for the placement outline of the testpoint.

             

            Thanks,

            Jeffrey Jenkins

            Sr. PCB Staff Designer, CID+

            L3 Technologies, Linkabit