We have some designs in old Design Capture - put these through the DC-to-DX translator and then on certain symbols on the schematic get swapped.
The physical connections are not affected as the wire just get jumbled up - however the at first glance the connectivity on the circuit appears to be incorrect.
Question I have is how can we ensure that when we translate these designs this does not happen?
Other information -
We have two central libraries - A design Capture one which the original project references and a later one (DxDesigner) which after translation we change the project reference to.
This is when it flags the symbols as out of date.
Have attached a ppt of slides to illustrate what we are seeing.
1st Slide shows settings for the translator.
2ns Slide shows (red box) the symbols flagged as out of date on the newly translated design.
3rd Slide shows the symbols swapped and the connections now appear wrong (yellow circles) - not very clear here but the wires remain connected to the correct pins.
This is going from Design Capture flow to VX1.1 flow with DxDesigner and Expedition.