10 Replies Latest reply on Dec 14, 2017 8:03 PM by mjk

    Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)

    mjk

      Dear all,

       

      I have a few questions about HyperLynx SI/PI.

       

      1. How to assign SPICE models or S-parameters to passive components like resistors, inductors, beads and capacitors in BoardSim.

      I can assign only values or IBIS models to passive components.

      For BoardSim, Is there any way to assign SPICE models or S-parameters to passive components besides setting the component type to IC?

       

      2. Stackup Editor - Signal/Plane

      As far As I know, signal or plane setting affects the impedance.

      1) Do the settings affect PI analysis(DC drop, Decoupling Analysis and Plane Noise Analysis)?

          I think they can affect SI and PI analysis because they affect the impedance, inductance and resistance of traces.

          But I don't know if my opinion is right.

      2) When there are traces and copper areas on a layer, then do I have to set the layer to signal?

       

      Thank you.

        • 1. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
          weston_beal

          Meejeong,

           

          BoardSim uses the series pin mapping in the IBIS file to correctly define series connections. Since SPICE and S-parameter files don't have this pin mapping syntax, BoardSim doesn't allow them for series devices. It could be argued that the series connection in a 2-pin device is implied, but as a general rule, the series pin mapping definition is required.

           

          With that in mind, an advanced user can do a couple of things to run an SI simulation with advanced models for passive devices. First, you could export the net to LineSim, and replace the series component with the SPICE/S-param symbol.This would be a good check to see how significant the advanced model is to the results of your simulation. Second, you could use the [Circuit Call] syntax in IBIS to include your advanced model. You still need to specify the series pin mapping, so define that with a 1MegOhm resistor just to define the logical connection.

           

          Here is a helpful technote about this topic. https://support.mentor.com/knowledge-base/MG591401

           

          Regarding the stackup, yes, you should always verify that the stackup in BoardSim is as accurate as possible. If a layer has a significant amount of area fill then you should declare it as a plane layer. This technote helps to understand how this affects SI solutions.

          https://support.mentor.com/knowledge-base/MG61444

          For PI simulation, it doesn't matter what the layer usage is. The simulation will use the designed metal structure of the nets involved in the simulation.

           

          Regards,

          Weston

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          • 2. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
            mjk

            Dear Weston,

             

            Thank you for your prompt reply.

             

            I'm not uncertain about which usage I have to set.

             

             

            For example, there are three traces and a copper area under the black segment.

            The usages of both top and bottom are signal.

            and as you can see, there is no plane under the segment.

            If I set the usage of bottom to plane, there will be a plane and the impedance will change.

            The impedance is affected by both usage and trace to area fill coupling.

            so I'm confused about the standard for settings.

             

            In this case, How can I check the accurate impedance?

            • 3. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
              mjk

              Dear Wetson,

               

              Thank your for answering my question.

               

              but I don't think I understand the second method using [Circuit Call] syntax in IBIS.

               

              I made samples for 1Mohm resistor with reference to MG591401.

               

               

               

              Could you please check whether they are correct or not?

               

              Thank you.

              • 4. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
                weston_beal

                Meejeong,

                 

                This is an interesting case. Depending on how you set options in BoardSim, the reported impedance of a trace could surely change. This is because the trace impedance is not well defined in the design. The impedance can only be controlled if there is a well-defined reference conductor. I think that the best you can do in this situation is to declare both Top and Bottom layers usage as plane and also enable the trace to area fill coupling, as you have shown. The area fill coupling will also apply to the adjacent layer, so the trace modeler will recognize trace segments (and sub-segments) where there is area fill on the other layer or where there is area fill only on the same layer. This model still assumes that the reference area fills are connected or bypassed in a very small impedance. You can run by-pass analysis to verify this assumption.

                 

                Regards,

                Weston

                • 5. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
                  weston_beal

                  Meejeong,

                   

                  I understand your confusion. In your original post, you asked about SPICE model for a passive series component such as a resistor, but the example in the technote is for instantiating a package model. The overall approach is similar, but the series model needs some different details. see the attached IBIS and SPICE files for an example. You can simply change the contents of the SPICE file to your actual model, and assign the resistor IBIS model to a resistor component in your design.

                   

                  Regards,

                  Weston

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                  • 6. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
                    mjk

                    Dear Wetson,

                     

                    Thank you for offering a IBIS model and a spice model.

                    I could do simulaiion with them.

                     

                    But I have a few questions.

                     

                     

                    1.

                        If I don't know parastic values of a IC package or a C_comp value, then Is it OK that I set them to 0 or leave them blank?

                     

                     

                    2.

                    I don't know which voltage range I have to set.

                    Is it ok that I use any values of voltage ranges for any passive components?

                    Is it ok that I don't care values of the voltage range?

                     

                     

                    3. I chaged the spice model as below to assign a s-parameter with reference to MG585714(https://support.mentor.com/knowledge-base/MG585714).

                       But I couldn't do simulation with errors.

                       Could you please tell me what's wrong with my spice model?

                     

                      

                     

                     

                    Thank you.

                    • 7. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
                      weston_beal

                      Meejeong,

                       

                      1. When you want to create a model that represents no package, you can set the *_pkg parameters to 0, but not blank. The fields must have some data. The typical value must be a number, and the other values may be NA. Likewise, C_comp must exist in the model block for correct syntax. The typical value must be a number and may be 0. The minimum and maximum values may be NA. I avoid using 0 in models in order to avoid divide-by-0 errors. I use very small values instead.

                       

                      2. The voltage range keyword is required in each model for correct syntax. Since the voltage has no effect in a series resistor, it doesn't matter what value you define.

                       

                      3. The sections of text that you showed are correct, but there are other sections that you need to check. In the [External Model] block of the IBIS file, the Corner line must correctly specify the SPICE file name and the subcircuit name within that file. In this case, it should look like this

                      Corner        Typ  res.sp  s_spar

                       

                      The other potential problem is with the Touchstone file. Have you confirmed that you can display the data curves in the Touchstone viewer?

                       

                      I hope this gets you all set up so you can run the simulation in BoardSim.

                       

                      Regards,

                      Weston

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                      • 8. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
                        mjk

                        Dear Wetson,

                         

                        I could do simulation with S-parameter thanks to your guide.

                        and I did simulation changing the parastic values of package, values of [R Series] and C_comp in the IBIS model.

                        I found out that they affected the waveform except the values of C_comp.

                        As far as I know, I can't get that values from datasheets.

                         

                        1. Is there any standards for setting that values when I can't get that values?

                         

                        Thank you.

                        • 9. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
                          weston_beal

                          the package RLC network is connected between the external pin and the IC die pad. The SPICE circuit that we instantiated in the IBIS component connects to the die pads. Therefore, changing the package RLC parameters affects the simulation results. If the SPICE circuit of the component includes all the structure out to the ends of the pins, then the IBIS package RLC parameters can be set to 0 (or extremely small values as I described earlier). The R_series element is included only to create a logical series connection in the IBIS component. The value of this resistor should be so large that it is effectively an open circuit. This element is connected in parallel with the SPICE circuit that we instantiated, so if changing the R_series value affects the simulation results, then the value needs to be larger.

                          1 of 1 people found this helpful
                          • 10. Re: Questions about HyperLynx SI/PI(Assigning SPICE/S-parameter, Stack up)
                            mjk

                            Dear Wetson,

                             

                            I'd really appreciate your reply.

                             

                            Your answers are very helpful.

                             

                            Thank you.