1 Reply Latest reply on Mar 6, 2018 11:11 AM by weston_beal

    DC drop simulation shows some vias carry much more current than others

    nikko.li

      I've run a DC drop simulation with Hyperlynx PI on a PCB. Since the max load is nearly 50A, I placed a lot of vias (>100) for the current to go from the source to inner layers than to the sink. The simulations shows the current is not evenly distributed among the vias although all vias are the same. Several vias carry as much as 1.9A while the vast majority carry much less. Why is that? Is something wrong with the simulation or with my layout?

       

      Thanks

      Nikko

        • 1. Re: DC drop simulation shows some vias carry much more current than others
          weston_beal

          Nikko,

           

          There are 2 things to consider. I expect that since the net delivers 50A that you have a multi-phase DC-DC converter power supply. The DC drop analysis models each of these as ideal voltage sources instead of variable current sources, so it doesn't distribute the current evenly out of all the phases. That might be a big or small factor in what you see in the results.

           

          The second thing to remember is that the traces or areafills in the power delivery net have resistance, too. The path from source to sink through each via is unique and has a unique resistance value. Therefore, the current through each via depends on the via itself along with the path resistance to the source and the path to the sink.

           

          Regards,

          Weston