I am doing a CPU simple scalar, it executes a single instruction pero cycle. I am using leonardo to get the netlist and then Pyxis to create the layout.
However to create the netlist of any memory involved on this CPU the tool get stuck and that is because the logic elements are to many so it can be solved. That is why a memory compiler have to be used to solve it.
Currently I am using OpenRAM to generate it, but I need to create the
GDS Library Cells:
• Column-multiplexer (if needed)
So I can use an script in OpenRAM to generate any SRAM that I need.
What is your approach to do SRAM memories to create the layout and then attach to the rest of the circuit?, in my case the CPU.
Thank you very much for your time,