2 Replies Latest reply on Mar 13, 2018 11:33 AM by charles.ietswaard1

    Backannotation

    charles.ietswaard1

      Hi All,

       

       

      Is there a way to control what properties are back annotated from Layout back to the schematic.

      Is there a way to include certain properties or to exclude properties?

       

      Thanks, Charles

        • 1. Re: Backannotation
          Jerry_Suiter

          Hello,

          In the end, the answer is yes and no.  Some properties like Cell Name can be controlled via the Additional Options UI under Project Integration.  However, Net Properties defined in Constraint Manager can not.  All you can control is who wins when properties are changed in both the schematic and layout and Back-Annotation need to merge changes.  This is controlled in Designer.

           

          The Library Property Definition UI allows you to control which properties end up in layout during Forward Annotation but this is really a single direction thus layout changes are not Back Annotated.

           

          Is there a specific property you're trying to control? What is the use case where you don't want a specific property to end up in the schematic?

          Thanks,

          Jerry Suiter

          Xpedition Systems Architect

          1 of 1 people found this helpful
          • 2. Re: Backannotation
            charles.ietswaard1

            Hello Jerry,

             

            Believe it or not, but your reply actually solves my problem.

             

            This is what we do, and yes, i Know, we shouldn't do this, but....

             

            We use IPC footprint for all of our parts in the Central library.  For large BGA's we place the decoupling capacitors between the courtyard via's of the fanout pattern. we can not do that with the IPC footprints so we created a special footprint with smaller pad size and rounded corners that exactly fits between the via's It is only allowed to use this footprint for this purpose.  Therefore this alternative footprint is NOT in the library.  We modify the parts that needs to be placed in the fanout area in the design.

             

            This causes the problem. During Backannotation the alternative cell name is send back to the schematic. When you need to run the packager, it fails because of the alternative footprint, added in Layout. So if i can prevent layout to send back the cell names to the schematic then I am fine.

             

             

            And in your reply you are actually telling me that I can prevent the cell name from being back annotated to the schematic, and that solves my problem.

             

             

            Thanks, Charles