The grey box you refer to is the FPGA Connectivity reserved area to automate the "Propagate FPGA Signal Name to Nets" used when synchronizing FPGA I/O Optimizer and the Designer schematic. It is created for parts type=FPGA on opening the schematic or when placing the FPGA symbol.
its visibility can be switched off in Designer display control.
You are correct the user is prevented to connect to the FPGA pins by abutment, which was correct at the time but functionality moved on and it is generally agreed we need to improve this - I cannot commit to a release yet but please let me have your contact details and I will let you know
thanks a lot for your quick explanation.
Now i can turn the visibility off – but the (non-) functionality is still there.
How can we reactivate “connect to the FPGA-Symbol pins by abutment”?
We were using this feature quite a lot – e.g. for disconnecting some wires and afterwards connecting all remaining wires again.
Your request is understood and I have I have requested Designer schematic improvement for VX.2.5