6 Replies Latest reply on Jun 18, 2018 8:10 AM by weston_beal

    Reg : Power and ground plane reference

    kalanidhi.gunalan@datapatterns.co.in

      Hai,

      I perform the SI (PCIe Gen 2 signal) with signal reference as both side power and both side ground for strip line.

      But in Eye diagram same results only getting.

      The difference of power and ground reference is taken into account or not. Kindly clarify.

      Thanks in advance.

        • 1. Re: Reg : Power and ground plane reference
          cathy_terwedow

          Thanks for your question Kalanidhi. I've moved it to the HyperLynx community where it should get a faster response.

          • 2. Re: Reg : Power and ground plane reference
            weston_beal

            Kalanidhi,

             

            When dealing with transmission lines, any constant voltage (power or ground distribution) net is considered as a reference net. The high-frequency currents will return on whichever plane provide the lowest impedance path. The PCB designer still needs to design the power distribution connections to the driving and receiving components that provide low impedance paths to both nets.

             

            So the simple answer to your question is that the DC voltage on the return path does not affect the trace impedance.

             

            Regards,

            Weston

            • 3. Re: Reg : Power and ground plane reference
              kalanidhi.gunalan@datapatterns.co.in

              Dear Sir,

              Thanks for your reply.

              I need to check the SI difference for below plane (power & ground) running two scenarios.

              Scenario-1:

              Signal

              Transmission Line type

              Transmission Line Top side

              Transmission Line Bottom side

              PCIe Gen 2

              Strip line

              Power

              GND

               

              Scenario-2 :    

              Signal

              Transmission Line type

              Transmission Line Top side

              Transmission Line Bottom side

              PCIe Gen 2

              Strip line

              GND

              GND

              Because PCIe gen2 signal recommending (In standard) the both side ground plane reference.

              Regards,

              Kalanidhi G


              • 4. Re: Reg : Power and ground plane reference
                weston_beal

                Kalanidhi,

                 

                When modeling PCB traces as transmission lines, all constant voltage nets (planes) act as references, also known as the return path. Therefore, regardless of the DC voltage on the planes, the transmission line model is the same, and thus the simulation results are the same.

                 

                This assumption of any constant net acting as a reference is valid in the general case of transmission line modeling. The key that the SI engineer needs to be aware of is the connection of the reference conductor to the active circuits (driver and receiver) at the ends of the transmission line model. If your connections are very low impedance around the device pins, then the assumption is still valid. If the PCB design does not have very good decoupling at the component pins or inside the package then the assumption is optimistic; the PCB will not perform as well as the simulations indicate.

                 

                You can use 3D field solvers (Mentor sells a couple), textbooks, layout guidelines, and SI consultants (Mentor has a few) to help understand what makes a good layout at the component pins.

                 

                Regards,

                Weston

                • 5. Re: Reg : Power and ground plane reference
                  kalanidhi.gunalan@datapatterns.co.in

                   

                  Dear Sir,

                  Thanks for your reply.

                   

                  From your reply:

                  1.DC voltage on the return path does not affect the trace impedance.

                  2.If the PCB design does not have very good decoupling at the component pins or inside the package then the assumption is optimistic; the PCB will not perform as well as the simulations indicate.

                   

                  Reply:

                  How can I validate, signal adjacent power plane providing enough low impedance for signal return current?

                   

                  Regards,

                  Kalanidhi G

                  • 6. Re: Reg : Power and ground plane reference
                    weston_beal

                    The answer to that question is the essence of signal integrity. The explanation is beyond the scope of this forum. Basically, you need to design the best decoupling that you can within the constraints of your particular design.

                     

                    You can get formal SI training from various sources, or you can hire an SI consultant, or you can follow some vendor guideline and hope it just works. Sometimes the hope method actually works.