Hi - I'm having problems generating a decal for a new component - can someone guide me to the best solution using pads layout 9.3?
I've attached the relevant DS page showing the required footprint. Its a simple rectangular pad with 2 non-plated drill holes. The pad is not required to be connected to GND.
Ideally the pad and holes should be defined in the decal and DRC should not indicate any clearance errors and the layout must match the schematic netlist.
I've tried associated copper but that didn't work with 2 drill holes. I can generate 3 terminals connected to GND in the schematic (attached) and this will allow me to define a via that matches the required hole size but the via is plated and connected to GND. Is there a better way to create a decal that meets the requirements? Thanks in advance