3 Replies Latest reply on Oct 15, 2018 7:41 AM by weston_beal

    PI Z impedance target and frequency



      I am trying to learn how to use hyperlynx PI and I can not understand how the frequency span to meet Z target is assumed ? I watched a video from Mentor stating till 300MHz above that frequency the IC modeling takes the effect.

      These days Microprocessors with PLL can operate in a very wide frequency range, so how do we know above 300MHz is nothing wrong specifically when the processor is working at high frequency ?

        • 1. Re: PI Z impedance target and frequency

          We don't know that there is nothing wrong above 300MHz. The issue is that the IC package acts as a low-pass filter and the cut-off frequency is usually around 300MHz or lower. The HyperLynx Decoupling analysis models the PCB so it doesn't much matter what the PCB impedance is above 300MHz. The IC sees a difference impedance inside the package, and we almost never have power net model of the package.

          • 2. Re: PI Z impedance target and frequency

            Thanks Weston for the reply, that means Hyperlynx should not allow the user to enter the frequency above 300MHz and in case the user has the IC package model Mentor should allow that to be imported.

            • 3. Re: PI Z impedance target and frequency

              This is where some engineering judgment comes into play. In some cases, you might want to examine the impedance of the PDN above 300MHz. I find it frustrating when tools put somewhat arbitrary limits on my analysis. The default frequency is good for most cases, though. The SI engineer needs to know or find out the frequency limitations of the IC package to know the upper limit of the PCB PDN effectiveness.