0 Replies Latest reply on Nov 26, 2018 1:23 AM by swb

    VX2.4, Update 2, Hetero 4, PDB has bad pin information

    swb

      Hello,

       

      I just tried to add a hetero 4 device (resistor network, 16pin, SO-16) to our test central library.

      It is working, but I get every time I add part number 2 to 8 of the single symbol this message:

      2018_11_26_10_11_46_CentralLibSvr.png

      Part Pin Mapping:

      2018_11_26_10_13_17_Pin_Mapping_10020793_10020793_.png

      res_8_2p:

      res_8_2p.png

      res_8_16p:

      res_8_16p.png

       

      It is working without message on pin 1 & 16 (part 1). On the follwoing parts the message appears - but it is still working.

      On the second symbol res_8_16p not message and problems occure.

       

       

      EDIT:

      A restart of the Designer software fixed the issue! No message appears right now!