1 Reply Latest reply on Feb 11, 2019 11:41 AM by dan_liddell

    Calibre LVS: How to compare the intrinsic diode (parasitic diode btw nwell & psub) area in LVS?

    kkmovva

      Hi

      I'm trying to extract the intrinsic Nwell- Psub diode area for accurate modelling. How can I make Calibre LVS to recognise the intrinsic diodes and compare the diode area against a schematic model?

       

      Thanks.

        • 1. Re: Calibre LVS: How to compare the intrinsic diode (parasitic diode btw nwell & psub) area in LVS?
          dan_liddell

          Hi,

          Declare your diodes as D devices as discussed in the SVRF Manual under Device. The property AREA is calculated and netlisted by default for built-in diodes. D properties are calculated internally as follows (you do not need to explicitly provide the property computation program unless you want to modify it:
          [
          PROPERTY A,P
          A = AREA(diode_layer)
          P = PERIM(diode_layer)
          ]

           

          Notice that for property tracing purposes, the property name is "A" and not "AREA". To compare the layout and source properties, you would do something like this:

           

          TRACE PROPERTY D A A 0

           

          dan