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Back annotation for wire RC

Question asked by popoyoho on Sep 19, 2019

Hi,

I have got the RC extraction values from PEX simulation. My testing circuit is very simple and there is a difference between schematic and post-layou simulation due to wire RC. So I subsititute wire RC back to my schematic with L or T model for wire. However, the results is quite different to post-layout simulation. Is my wire model incorrect? or I missed sth?

This is RF circuit design.

Thanks

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