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Read problem IMX6 from DDR3L micron

Question asked by paoben on Mar 9, 2020
Latest reply on Mar 13, 2020 by weston_beal
I'm simulating a DDR3L interface between IMX6 and 4 micron DDR3L  1066MT/s in T-branch topology.
The test result is ok except when IMX reads from DDR, I tried with various impedance / odt but it doesn't change, the data paths are very short, about 2 cm and with the same length as the respective DQS, in writing mode there are no problems.