Another very important metrics is yield sensitivity index. Designers should account for yield sensitivity from the very early stages of the physical implementation of the layout**. **

All little bit info about CA and basic formulas.

The critical region for random spot type defects of the given size **d** is the locus that a single defect of size **d** causes a fault if and only if its center belongs to that region. The area of the critical region is called the critical area. The critical area is a function of the defect size. It is denoted as CA (x).

Now, consider the defects of one type on one layer.

**Basic Formulas**

1. Let D0 be the defect density that is the number of defects per unit area.

2. Let f(x) be the defect size distribution function, i.e.,

a

∫f(x)dx

b

shows the probability that **a** random defect will have size larger than a, but smaller than **b**.

3. Correspondingly,

a

D_{0} ∫f(x)dx

b

shows the average number of defects per unit area with size larger than **a**, but smaller

than **b**.

The yield sensitivity index or YSI is defined as the average number of faults (or the average number of failures). This value shows how many faults will on average be caused by the considered type of defects on the considered layer.

a

** **YSI= D0 ∫CA(x)f(x)dx)

** ** b

Normally, the YSI value needs to be much smaller than 1, otherwise the yield will be very low. To avoid dealing with fractional numbers, it is practical here to show this value as the YSI part per billion dies (YSI ppd).

Above we introduce the YSI calculation for one particular layer and defect type, to calculate the whole chip YSI let’s define YSI(i,j). Where i is one particular layer name and j is particular defect type (open or short). In that case total YSI can be calculated as:

YSI_{TOTAL }= ∑YSI (i,j)

i,j