I am wanting to get insight and understand into the thinking of the calibre lvs tool and how it decides what geometries to push and pull when creating it's layout netlist when using automatch with no hcell.
Sometimes I will have a cell instaniated at the top level in my cadence virtuoso layout and also at the same level have some supply decoupling caps. When I run lvs (hier with automatch) it will push those caps down into the cell, and then say I have extra layout devices in the subcell, and have extra schematic devices in the top cell.
I hoping for some insights into the "thinking" of the tool.
Any insights, URLs to documents or technotes or previous posts is well appreciated. Thanks.