DxDesigner schematic DRC rules are missing one fundamental check: single pin nets (net attached only to a single pin).
We are using multi sheet flat designs with a lot of ports and named nets and then we don't have any way of cheching if due to a typo during naming nets/ports the connectivity is not there.
Existing 2007.7 DRC rules as 103 (unloaded net) or 105 (undriven net) among others are not doing the trick (also a lot of connectivity rules rely on having proper input/output definition in symbols).
Do anyone have a script for cheching just single pin nets?
NOTE: I know singlepinnets.vbs but is intended to work under Expedidion and we like to conduct DRC under DxDesigner during schematic creation