You can style splices such that they appear the way you want them on the diagram.
For multicores, because they're not confined to nodes, and can extend across multiple bundles, they're not styled like splices.
Could you elaborate on the desired view of multicores please?
In VeSys Classic you can display a diagram of the splice which graphically shows the wires as they enter the splice, this is independant of the representation of the splice in the harness. These splice diagrams are all grouped together so you can see how all the splices in the harness are configured and this is the functionality that eortiz is referrring to. At the moment I do not believe VeSys 2.0 has this functionality.
We added Splice Diagrams into VeSys 2.0 v2009.1. The graphics for these diagrams are configurable (unlike Classic).
Ahhhh I stand corrected, I should have phrased it that my version doesn't have them!