Yes they are just graphics because they are of type "Annotate" (like borders). I think there are same level hierarchical connectors available. And in EE2007.9 they changed on/offsheet connectors to bear logical data too.
For signals that go across sheets at the same level of hierarchy the connectivity is driven by the name of the signal (net). The on-sheet/off-sheet connectors are used by the cross referencing tools (SCOUT) to annotate the location of the cross-referenced net only and this value does not influence the connectivity. Naming the on-sheet/off-sheet connector does not name/rename the net. If you do not use the cross referencing tools you may leave the nets dangling and the connectivity will be maintained by net name association between schematic sheets. For completeness I have always preferred to add on/off-sheet connectors but that is a personal choice.
For hierarchical designs it is a little different, the symbols used in this case are PINTYPE components as opposed to ANNOTATE type. These Port Connector symbols do affect connectivity as they link the signal (net) in the lower level schematic to the pin of the parent block. In this situation it is acceptable to have a different net name to connector name, providing the connector name matches the pin name of the parent block (note this is for DxDeigner 2007.x not earlier versions). The real signal name is flattened at the top level of the hierarchy, therefore it is possible that the net at the top of the hierarchy connects to a pin on a hierarchical block that has a different name and this pin connects to a different net name in the child schematic. For example Net A at the top of the design connects to a block at Pin B, in the child schematic Port Connector B connects to Net C. Ultimately Net C becomes flat net A.
Does this mean that if I have two signals named the same which appear in two different lower level hierarchical schematics, they will not connect physically unless they are brought to their respective top level hierarchical blocks and connected by pins at that level? In other words, signal "A" on one schematic will not connect to signal "A" on a second schematic, whether they are left as dangling nets or have a port connector, unless they are brought to the top level and connected between hierarchical blocks. I apologize if I'm re-hashing here, just want to be sure.
Based on your statements then you are correct, the nets will get flattened to different names, but I would check out the case where you mention a port connector, in this case in the Expedition flow you will get an error that the port has no corresponding parent pin.
If you are using the netlist interface to PADS or a third party layout tool then I would check what the PCB Interface does in these cases. In general nets are unique through the hierarchy unless explicitly connected, this is not the same across a single hierarchical level. DRC-121 is the verification check that will flag such issues, configure the check so that it looks for on/off-sheet connectors for dangling nets as specified in your special components settings. So if your on-sheet connector is in library 'basic' and is called 'on' then the values for DRC-121 'Internal connection symbol(s)' would be basic:on and also for 'Flat connection symbol(s)'. This has the effect of enforcing you to use such connectors for nets both intra-page and inter-page. You may configure this to be a warning rather than an error in Verify.
Ron, this is true, but another option is to make the net a global net like power and ground by using a PIN symbol with the NETNAME property for the netlist/PADS flow or "Global Signal Name" for the Expedition flow.
I am attempting to do as Gary suggests -- create my own offsheet symbols that are PIN type symbols with NETNAME property. This way I can populate the NETNAME property and it will automatically name the net I hook it to and will be global to my project. I prefer this behavior for my offsheet connectors.
The issue I have run into is: when I add the NETNAME property to the symbol, the symbol no longer shows up as an option to add as a PORT IN special component. If I remove the NETNAME property, the symbol can be added as a PORT IN special component. Why is this?
I am using DxDesigner, PADS 9.5 Flow.
Because with the NETNAME property the symbol is no longer a "Port" and is now a "Global"
A Port is specifically the Pin from the Upper level block, and inherits the name and directional properties of the symbol pin as defined in the special components list. This is the reason a Port uses the Pin symbol. For global signals, a pin is not used on the block unless the signal is meant to be locallized on the lower level schematic pages. The most common Globals are POWER and GROUND pins.
LINKS are on-sheet/off-symbols annotation symbols and will inherit the name of the net automatically if Setup, Settings, Advanced "Automatically synchronize on-sheet/off-sheet links and nets names" is checked. LINKS do not traverse hierarchy, and are not required in DxDesigner to connect nets across a page or multiple pages on the same hierarchy level. On the same hierarchy level, nets are connected simply by naming each net segment. Links do provided the benefit of enabling JUMPS and Cross-referencing documentation features.
Ah, great! I did not see the "Automatically Sync on-sheet/off-sheet links and net names". Thank you for clarifying things.
Gary, is it possible to come down from a hierachical block with a port (symbol) and go on the same level to e.g. 4 different schematics with offpage connectors ?
The EN/EXT signal comes down from a block symbol and connect via the offpage connector some more schematics on the same hierachical level.
Will this work w/o any DRC-121 message?
Thanks and Best Regards