2 Replies Latest reply on Jul 16, 2010 7:09 AM by toberrau

    HyperLynx DDRx Batch Simulation

    toberrau Talented

      I have a problem with my DDRx Batch simulation.

      My board has an PPC405 as DDR2 Controler and 2 Micron 1Gbit DDR2 400 Memories. I have also an 3. DDR2 for ECC on the ECC Port of the PPC405.

      The simulation works fine, but in the results DDR_report_data_allcases_Typ.xls is in every write cycle in the comment:


      "Multi-threshold for the strobe net is found!!! Calculation of setup/hold time is cancelled for this net!"


      But the DDR_audit{Design1}.xls i get a pass in every signal.


      Have someone an idea?


      Nice weekend,



      (on the attached file, the red one is the signal on the DDR2 Memory. The yellow one on the PPC405)