Katkoria.Deepak

Boardsim v8.1

Discussion created by Katkoria.Deepak on Oct 18, 2010
Latest reply on Jan 6, 2011 by Katkoria.Deepak

Hello Expert,

 

I am getting some problem with Hyperlynx simulation. Could you please suggest a solution on these issues.

 

  1. In Boardsim v8.1, How can I bypass the test point and Jumper. when I simulate this signal, it count the test point/jumper as a receiver..

What is the alternative way then using a Ref. designator mapping. (Some times Ref designator mapping dont work as expect)

 

  1. Can I know the file name, which holds all the database of Ref. designator mapping, and Power supply nets, so I don’t have to set/change this value every time I convert PCB file into boardsim format. I will just paste my old file for Ref. Des. Mapping and power supply nets.
  2. I wrote a dummy Ibis model for jumber, but that is also not working...How can I show that jumper are shorted and not open..(note: I have big PCB file, I want to avoid a manual work of deleting the jumers and short then with track. Do you have a model for Testpoint & Jumper, so I can add the RLC value (of J /TP) in to simulation.

 

4. In DDR3 batch wizard, I cannot add the Data Strobe net in proper pair (pos/Neg).

Even after editing the .ddr batch file, I cannot solve the problem.

 

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.5. I have written a DDR3 timing model ( to compensate the controller timing). Can I know how to use the timing model in DDR3 batch simulation.

 

Cheers,

Deepak

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