7 Replies Latest reply on Jan 6, 2011 6:56 AM by Katkoria.Deepak

    Boardsim v8.1

    Katkoria.Deepak

      Hello Expert,

       

      I am getting some problem with Hyperlynx simulation. Could you please suggest a solution on these issues.

       

      1. In Boardsim v8.1, How can I bypass the test point and Jumper. when I simulate this signal, it count the test point/jumper as a receiver..

      What is the alternative way then using a Ref. designator mapping. (Some times Ref designator mapping dont work as expect)

       

      1. Can I know the file name, which holds all the database of Ref. designator mapping, and Power supply nets, so I don’t have to set/change this value every time I convert PCB file into boardsim format. I will just paste my old file for Ref. Des. Mapping and power supply nets.
      2. I wrote a dummy Ibis model for jumber, but that is also not working...How can I show that jumper are shorted and not open..(note: I have big PCB file, I want to avoid a manual work of deleting the jumers and short then with track. Do you have a model for Testpoint & Jumper, so I can add the RLC value (of J /TP) in to simulation.

       

      4. In DDR3 batch wizard, I cannot add the Data Strobe net in proper pair (pos/Neg).

      Even after editing the .ddr batch file, I cannot solve the problem.

       

      clip_image001.jpeg

      .5. I have written a DDR3 timing model ( to compensate the controller timing). Can I know how to use the timing model in DDR3 batch simulation.

       

      Cheers,

      Deepak

        • 1. Re: Boardsim v8.1
          Steve_McKinney

          Hi Deepak,

           

          Here are some comments to your questions below.

           

          -Steve

           

          Katkoria.Deepak wrote:

           

          Hello Expert,

           

          I am getting some problem with Hyperlynx simulation. Could you please suggest a solution on these issues.

           

          1. In Boardsim v8.1, How can I bypass the test point and Jumper. when I simulate this signal, it count the test point/jumper as a receiver..

          What is the alternative way then using a Ref. designator mapping. (Some times Ref designator mapping dont work as expect)

           

          Is it that you want to just eliminate this waveform for your results?  You could turn off the probe and not view it.  If there is no model present, it will just appear as an open circuit in the simulation, so you will get whatever effects exist due to routing to that test point or jumper, but there won't be any loading at that point.  The Ref designator mapping should function where you can add these RefDes so they don't show up as ICs.  If it is not working like you would expect it to, I'd like to hear your input.

           

          1. Can I know the file name, which holds all the database of Ref. designator mapping, and Power supply nets, so I don’t have to set/change this value every time I convert PCB file into boardsim format. I will just paste my old file for Ref. Des. Mapping and power supply nets.

           

          These settings get saved to your .BUD file.  If you preserve this file, it should preserve your changes that you made when you update the .hyp file.  Also, there are .REF and .QPL files that are can be used for assigning models to ICs as well as assigning values to discrete components in BoardSim. 


          1. I wrote a dummy Ibis model for jumber, but that is also not working...How can I show that jumper are shorted and not open..(note: I have big PCB file, I want to avoid a manual work of deleting the jumers and short then with track. Do you have a model for Testpoint & Jumper, so I can add the RLC value (of J /TP) in to simulation.

           

          My suggestion on this one would be to assign an EBD model to the jumper or test point.  This would allow you to account for the parasitics and also tie together the 2 pins that you want to short.   You can modify this EBD model that I've attached. The example uses a 10ps, 50ohm transmission line.  You can modify the parasitics that I included to create something longer, shorter, or whatever you want/need. 


          4. In DDR3 batch wizard, I cannot add the Data Strobe net in proper pair (pos/Neg).

          Even after editing the .ddr batch file, I cannot solve the problem.

           

          Please submit a support ticket on SupportNet for this particular issue. They can hopefully get this sorted out for you.  It could simply be a model assignment issue.

           

          clip_image001.jpeg

          .5. I have written a DDR3 timing model ( to compensate the controller timing). Can I know how to use the timing model in DDR3 batch simulation.

           

          You can assign this model in the DDRx wizard.  You should either add the saved location of the file to your Model Search Path (on the menu, Models > Edit Model Library Paths) or save it to an existing model search path.  Then you can select it from the available timing models in the wizard.

           

          Cheers,

          Deepak

          • 2. Re: Boardsim v8.1
            Katkoria.Deepak

            Hi Steve,

            Thanks for quick reply..

             

            Please see the clarification on my questions.


            Is it that you want to just eliminate this waveform for your results?  You could turn off the probe and not view it.  If there is no model present, it will just appear as an open circuit in the simulation, so you will get whatever effects exist due to routing to that test point or jumper, but there won't be any loading at that point.

            >
            I would like to bypass the jumpers. Its bit hard to explain that how we are using the jumper on the schematic. but we dont want it to appear on simulation. For test point may be I will use the EBD model.

             

            The Ref designator mapping should function where you can add these RefDes so they don't show up as ICs.  If it is not working like you would expect it to, I'd like to hear your input.
            > Example all the termination resistor are starting with 6Rxxx number, when I am adding 6R as resistor in mapping window. I would expect to see a translated free form schematic show me 6R as resistor and not open track. all my ref. mapping are showing open after doing export.
            So I believe that mapping in bordsim is not assigning the model properly.

             


            These settings get saved to your .BUD file.  If you preserve this file, it should preserve your changes that you made when you update the .hyp file.  Also, there are .REF and .QPL files that are can be used for assigning models to ICs as well as assigning values to discrete components in BoardSim.


            >
            thats is helpfull information, I will try and update you with result. is it safe to copy this file into new hyperlynx(.hyp) folder. it will not crash or loss any nets or connectivity.

             

             

            Cheers,

            Deepak

            • 3. Re: Boardsim v8.1
              Steve_McKinney

              Hi Deepak,

               

               


              Is it that you want to just eliminate this waveform for your results?  You could turn off the probe and not view it.  If there is no model present, it will just appear as an open circuit in the simulation, so you will get whatever effects exist due to routing to that test point or jumper, but there won't be any loading at that point.

              >
              I would like to bypass the jumpers. Its bit hard to explain that how we are using the jumper on the schematic. but we dont want it to appear on simulation. For test point may be I will use the EBD model.


              Maybe you can post a graphic of what you're trying to do.  One thing to note, if you create a FFS schematic and there is no model assigned to the IC buffer, then there is no load there and will not impact the simulation.  So unless the jumper is actually providing connectivity, just don't assign a model to it and it's like it is not even there.

               

               

              The Ref designator mapping should function where you can add these RefDes so they don't show up as ICs.  If it is not working like you would expect it to, I'd like to hear your input.
              > Example all the termination resistor are starting with 6Rxxx number, when I am adding 6R as resistor in mapping window. I would expect to see a translated free form schematic show me 6R as resistor and not open track. all my ref. mapping are showing open after doing export.
              So I believe that mapping in bordsim is not assigning the model properly.

               

              Are these discrete resistors or resistor packs?  If they are resistor packs, it may simply be an issue with properly setting up an r-pack model.  I would suggest you get a support ticket entered on this and they can probably get you up and running.

               

              These settings get saved to your .BUD file.  If you preserve this file, it should preserve your changes that you made when you update the .hyp file.  Also, there are .REF and .QPL files that are can be used for assigning models to ICs as well as assigning values to discrete components in BoardSim.


              >
              thats is helpfull information, I will try and update you with result. is it safe to copy this file into new hyperlynx(.hyp) folder. it will not crash or loss any nets or connectivity.

               

               

              Yes, it's safe to copy this over into the new .hyp folder.  Just make sure it's the same design (just new version) and that the file name of the .BUD matches the file name of the .HYP (for example, mydesign.bud and mydesign.hyp).

               

              -Steve

              • 4. Re: Boardsim v8.1
                weston_beal

                I have a minor correction on the refdes mapping. These settings are saved in the BSW.INI file, so changes to the mapping apply to all designs, current and future, until you change it again.

                • 5. Re: Boardsim v8.1
                  Katkoria.Deepak

                  Hi Weston,

                  I hope you had a good new year break.

                   

                  I was looking for Apps note(www.....\10685.cfm) refered in App note 10706. I would like to know on how to interpret the spreadsheet results.

                   

                  I am getting some violation on data line. Wizzard is doing a read operation on pin (not on Die).

                   

                  I will appericiate if you could forward me that Apps note asap.

                   

                  Thanks,

                  Deepak

                  • 6. Re: Boardsim v8.1
                    cathy_terwedow

                    Hi Deepak,

                    The AppNote you're looking for is available from http://supportnet.mentor.com/reference/appnotes/index.cfm?id=10685. You'll need a SupportNet login to access the link. Let me know if you have any trouble.

                    - Cathy

                    • 7. Re: Boardsim v8.1
                      Katkoria.Deepak

                      Hi Cathy,

                      Thanks for quick respoonse.

                       

                      I have raised the request to access this AN.

                       

                      BR,

                      Deepak