the solution you would like to have is very specific.
Our designs (also very dense) do have those issue too. And as you descibed,
we also have defined a "miniArea" Rule scheme, to handle those areas.
But, shouldn't the rule be connected somehow to the part instead of being on "short traces".
Those short traces can occur anywhere and you will have hanger or other unusefull stuff then?
On approach we are following sometimes is to define a rule scheme in library.
As an example:
- draw the area a critical point in the part (e.g. connector) and name it "Technology", so you know, whenever this area appears, you are allow to follow your minimum PCB technology
- Defin rules for the "Technology" scheme in CES and your routing will obey those, without any violation of PCB Technology too.
- Define a process, so all people know, how to define "Technology" for every new PDB.
If you, for some reason, doe not need to define a "Technology" scheme, e.g. your default is small enough, you can change it by tthe keyin "remap" in Expedition.
The part cells have two layer, and the short trace I've described theoretically may occur on every layer. You can define the rule area in cell only for outer layer or for all layers. And in the new Expedition revision you can not change the layer imported with the part, only copy it and put out of component connection. Beside, when you design a part cell you can not know exectly fanout location, so the rule aria would be larger then need.
I didn't understand this sentense:
"Those short traces can occur anywhere and you will have hanger or other unusefull stuff then? "
I can't see how the DRC default rule definition for short length traces may cause to "hanger or other unusefull stuff".
Andreas's suggestion is useful. For your case, you can use via-via clearance setting of same net to control it.
Andreas didn't suggest something new. We are using rule areas include inside the parts, but this has restriction I mentioned in my previous messages (please study them carefully). Let the other Mentor users say their opinion. The administration position is clear. By the way it is nothing to do with via-via clearance or hangers, etc...
I may don't understand what you wanna do. If you hope to keep the clearance (distance) between via1-2 and via2-11 less than your general clearance via2via for this net type and not DRCs, my suggestion difinitely works well. I will tell you how to set it step and step.
If I am wrong to undstand what you wann, please describe it specific. Maybe I have another way to deal with it.
Hi Olga, It’s great idea. But You didn't specified that this short traces are actually segments from via to via (center to center) when trace changes layers. So DRC might have option to exclude short net segments per layer from class clearance rule.