1 Reply Latest reply on Feb 24, 2011 5:44 PM by weston_beal

    Pin vs. die probe locations?

    adam.dixon

      I am simulating a bus with IBIS models, none of which have the Timing_location keyword.  The HL8.0 Help file indicates that pin-location is selected if the Timing_location keyword is not present.  Simulation results are dramatically different between the pin and die locations.  My models have what look like realistic values for package parastics (R_pkg, C_pkg and L_pkg) and pad capacitance (C_comp) parameters.

       

      Under what cases is pin location recommended versus die?  Strictly when trying to correlate simulations with physical probing?  In this case, pin-level probing has gross (unacceptable) non-monotonicity compared to die-level probing for a simple point-to-point topology.  I'd like to better understand in advance of physical prototyping.  Thanks very much!

       

      egards,

      Adam

        • 1. Re: Pin vs. die probe locations?
          weston_beal

          Usually, the reason we do SI simulation is to verify compliance with some specification. If the quantity (overshoot, timing, etc.) is specified at the device pin by the vendor, then you need to measure the signal at the pin. This is traditionally the location that IC vendor use in data sheets. That is why HyperLynx defaults to measurement at the pin. In newer specification that realize that designers will simulate, the specified quantities are defined at the die. That's where it really matters, but before simulation was popular, it simply was not practical to define requirements this way.

           

          So, measure at the pin or die to match the method used to define the constraints you are verifying.