Read violation while simulating DDR3 with DDRx wizard

Discussion created by satyalingam.karnati on Mar 3, 2011
Latest reply on Apr 8, 2014 by manikandan.chellaiyan

While simulating 1 DQS and 1 DQ, we are getting a Read Violation and we doubt whether the excel sheet is calculating it correctly or not.




Considering the following settings while reading from DDR3 :-


Setup Requirement from controller = -210ps (It means that data should be stable before max value of 210ps measured w.r.t VREF also in this DQ and DQS are edge aligned)


Initial Delta Delay = 152.5ps (max value of tDQSDQ = 125ps and min value of tDQSDQ = 180ps)


Output Impedance of DDR3 and controller = 34ohm




Simulation Results :-


Case1 with Controller ODT 60ohm and DDR3 ODT 60ohm


Setup time from simulation (Column J) = Some negative value




Case2 with Controller ODT 40ohm and DDR3 ODT 60ohm


Setup time from simulation (Column J) = Positive Value




Relevant waveforms and excel sheet for the above two cases are attached.




Doubts :-


o Eye Diagram is getting improved for Case 1 but the timing are getting bad which should not be there.


o Also in case 2 positive value should not come as DQ (AC level) is after DQS (Crosspoint level) so the setup time should be negative.