Register now for Mentor Graphics User Group Meeting in Santa Clara on Tuesday, April 26, 2011 at the Santa Clara Marriott. This FREE one day meeting will include product roadmap and technical sessions on Calibre. Below is a list of topics that may interest you from the Calibre Track. Don't forget you can visit other product tracks during the conference. We have technical sessions on Functional Verification, Silicon Test & Yield Analysis, PCB Flow, Custom IC/AMS, and Place & Route.
Calibre Product Update & Roadmap - Mentor Graphics
Using DFM Commands for Implementing m & nf Parameter Matching in LVS by GLOBALFOUNDRIES
Calibre DRC/ERC Data Splitting Into User-Specifiable Sub-block Space - Fastrack Design/PLX Technology
Title TBD - LSI
Transforming Verification - Mentor Graphics
Using OVM with Transaction and Emulation Based Simulation Acceleration - Altera
Case Study "Proving OVM on a Real Design - Testimonial by apm - Applied Micro
Verifiying Bus Bridges with Questa Verification IP - Microsemi
Silicon Test & Yield Analysis
Silicon Test & Yield Analysis Products Update - Mentor Graphics
Effective Method for Statistical Failure Analysis Using Tessent YieldInsight - Fujitsu Semiconductor
Hybrid Test Methodology: High Quality Test - Broadcom
*if you stay for the networking reception you can enter to win one of our iPad 2.