I came across parasitci extraciton problems when using calibre, hope someone can help me:
The process i used provides deep nwell(DNW) for pusb isolation. So for some NFETs, I had S and B connected together to a different potential(net, suppose its name is Vx) from Gnd.
When run calibre c+cc parasitic extracion, i found the parasitic lumped capacitors of these NFETs, which are supposed to these isolated psub(net Vx), are to the whole pusb(net Gnd)~ Obviously, this is not correct.
So, how can i extract the parasitic capacitors correctly?