You simply mark those physical nets that you want to split out as with the "analog" flag. This prevents CES from automatically connecting that net into an electrical net through a series element.
Gary, I am not sure that I understood the issue, and if I did, I don't understand Steve's answer.
I face a problem which looks to be the same: I often want to connect sense lines to current sense resistor for example,
as 2 diff. pair "Kelvin connection".
These 2 lines are sense lines with low current, but it gets the same net name and net attributes as the main high current nets they are connected to.
I found no other way but to add to my library component I called "VirtualJumper" and to connect it between the high current net and the sense net.
This way I can give the sense net a different name with other attributes.
If ther is another way to do it I will be glad be updated.
Net and Enet are different objects. Net is a primitive object, you can't divide it any more, only Enet can be seperated to individual net objects in CES.
Below is the topology where you can break the Enet into net1 and net2 in CES per what Steve told, but you can' t divide
net1(net2)as two nets of net1_TL1 and net1_TL3(net2_TL4 and net1_TL5).
1.jpg 27.5 KB
I, too have struggled with making a Kelvin sensing footprint that doesn't drive the DRCs crazy. And me.
I am going to start using this method (attachment), which should work. It will probably generate spacing errors because I will make the gaps narrow, but at least it will let me route to the pins.
If there is any other way to do this, I would love to know.
The best solution I had up until now was to have the two Kelvin pads "floating" in the footprint. On the layout, I had to remember to go to each part and add a bridge copper connection. That generated spacing violations, but it was easy to see and I just ignored them. The danger of course is that you won't get a connectivity warning if you forget to add the bridge copper.
So this footprint (attached) may be just a tad better. But still not ideal.
The ideal would be to allow a bridge copper in the footprint that would not generate DRC errors on the final board design.
KELVIN_OPT.JPG 15.7 KB
Has there been any new activity or ideas for solving the Kelvin connection problem? This is a serious issue that needs a solution.