I'm working on the layout of some multilayers PCB with DxDesigner 7.9.2 ... i found these little "bugs" (or maybe i made some errors..):
1) When export the scheme in pdf I've seen that IF the name of a resistor overlaps the symbol's edge then it won't be shown on the PDF sheet...
2)When I rip a bus, i get the wire but I can't resize the spaces between the wires as I wish...so I don't use the rip option but I use the array option in this case.
I remember that in 7.9.1 you have a resize box option ( with a red square symbol...) ...
Thank you for the help!