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DDRx simulation in hyperlynx 8.1

Question asked by anum.el.27 on Feb 12, 2012
Latest reply on Jan 20, 2014 by soumya.artabandhu

Hi all


Is it possible to perform DDR2 timing analysis in linesim by simulating two or more DDR signals simultaneously for e.g. simulating data and strobe or clock and address at a time.