I've been asked to look at a tool called HyperLynx DRC, which (I think) is Mentor's incorporation of the QuietExpert rules (developed in collaboration with UMR?) into the HyperLynx Tool Suite. Anyway, I thought I might share a picture that grabbed my attention as I was scanning the documentation.
This is just one of many types of rules that HyperLynx DRC processes, and for this one the user can change the default frequency and distances shown in the table, and Mentor will just add up the segments that cross the line (D1 and D3) to set the red flag.
For one thing, it seems fishy to just add D1 and D3 together. And is segment D2 really "OK"? Does the default .5 inch and 40 mil settings have some basis at 1GHz?
Maybe that is enough questions for one post, but I can't help but comment on the fact that the I/O line is labelled as the victim. Maybe my board designer bias is showing, but I tend to think of the big bad outside world as the aggressor, and my sensitive circuit guts as the victim (at least that is true for some of the sensor-based boards I design here). I know it works both ways for EMC certification, and it is a big job to CONTAIN the frequencies being used today, but can this rule be made to work both ways?
Finally, It seems curious to me that this DRC module is MUCH more expensive than the SI and PI modules. Why would that be? What is more valuable about a rule-checker than a simulator?
onward thru the fog,