erdin.sinanovic

Unexplainable warning in DDRx Batch Simulation

Discussion created by erdin.sinanovic on Jun 13, 2012
Latest reply on Jun 14, 2012 by cristian.filip

Hello!

 

I want to run a DDRx simulation. I have everything set up, but I get a strange error and I can't explain why. Here's the logfile:

 

Software Version: v8.1 build 511 (511, 0)

 

** WARNING ** : U2.L2 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.B9 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.M8 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.D10 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.M2 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C8 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.N8 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A8 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.M3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C7 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.H7 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A12 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.M7 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A7 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.N2 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A6 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.G1 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A15 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.H3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C11 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.H2 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C12 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.G9 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C14 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.J2 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A11 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.K8 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.D12 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.J3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A10 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.K3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.A9 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.L7 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.B12 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.L3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C9 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.K2 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C10 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.L8 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.D11 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.F3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.D14 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.G3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.D13 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.K7 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.C13 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U2.N3 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

** WARNING ** : U1.B6 pin of DDR3_CKP net does not have opposite pin although net is supposed to be differential

NETS FOR AUDIT

**********************************************************************

Nets Selected For Simulation (3):

DDR3_CKP, DDR3_DQSP, DDR3_DQ6

 

NEXT RUN INFORMATION

**********************************************************************

Audit for the net: DDR3_CKP with type: W1_Typ

** Error **: Too many drivers, not allowed in the DDR interface! Driving pins: U1.A14, U1.B9, U1.D10, U1.C8, U1.A8, U1.C7, U1.A12, U1.A7, U1.A6, U1.A15, U1.C11, U1.C12, U1.C14, U1.A11, U1.D12, U1.A10, U1.A9, U1.B12, U1.C9, U1.C10, U1.D11, U1.D14, U1.D13, U1.C13, U1.B6

** Info **: Initialization of drivers failed!

  

NEXT RUN INFORMATION

**********************************************************************

Audit for the net: DDR3_DQSP with type: W1_Typ

NEXT RUN INFORMATION

**********************************************************************

Audit for the net: DDR3_DQSP with type: R(1,1)_Typ

NEXT RUN INFORMATION

**********************************************************************

Audit for the net: DDR3_DQ6 with type: W1_Typ

NEXT RUN INFORMATION

**********************************************************************

Audit for the net: DDR3_DQ6 with type: R(1,1)_Typ

 

AUDITOR ERRORS REPORT

**********************************************************************

Net DDR3_CKP:

Too many drivers, not allowed in the DDR interface! Driving pins: U1.A14, U1.B9, U1.D10, U1.C8, U1.A8, U1.C7, U1.A12, U1.A7, U1.A6, U1.A15, U1.C11, U1.C12, U1.C14, U1.A11, U1.D12, U1.A10, U1.A9, U1.B12, U1.C9, U1.C10, U1.D11, U1.D14, U1.D13, U1.C13, U1.B6

Net DDR3_DQSP:

No errors;

Net DDR3_DQ6:

No errors;

END TIME

**********************************************************************

Date .............................Jun.-13-2012

Time .............................11h-18m

Total Run Time ................... 0 Days, 00 Hours, 00 Minutes 09 Seconds

 

**********************************************************************

 

 

The pins, which the warnings are referencing to, are the control pins of the controller and the DRAM module. The error at the bottom seems to be connected to the warnings from above...

Can someone shed light on this issue?

 

Cheers!

Outcomes