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How to disable the Nested interrupts capability in a PLUS port?

Question asked by dan_schiro on Aug 6, 2012

Here are some instructions to do so in ARM ports. These may vary for other ports.

There are 2 basic different schemes in which we support nested interrupts for ARM.


In the 1st scheme the interrupt controller has no hw prioritization / nesting capabilities - we have to do all this in software.


In the 2nd scheme, the interrupt controller will perform hardware  prioritization of interrupts and does the necessary masking in hardware  (all the ATMEL processors and many of the newer processors have these  features).


For the 1st scheme, here is an outline of what needs to be done to remove the nesting code:


  1. In INT_IRQ (same applies to INT_FIQ if you are using FIQs) the  code that reserves space on the IRQ stack and places the current  interrupt mask / enable register on the stack can be removed. We usually  subtract 4-8 bytes (depending on number of mask registers) from the  stack near the top of this function.
  2. The search routine for the highest priority pending interrupt  can be simplified / stream-lined. We get the pending interrupt register  and use a priority table to check each interrupt source in the order  specified in the table. To allow for nesting, this search also updates  the interrupt mask / enable value(s) - this update isn't necessary and  can be removed.
  3. After we have found an IRQ, we write the new / updated interrupt  mask / enable register value to the interrupt mask / enable register -  this masks the interrupt currently being serviced and all lower priority  interrupts. If no nesting is needed, this code can be removed.
  4. Within the interrupt shell, the code to re-enable IRQ interrupts must be removed.
  5. The macros used to unnest interrupts can be defined as empty macros or removed from code. ( Something you were already doing).


For the 2nd scheme, there are a lot less changes needed:


Usually (depending on the interrupt controller), the only thing that  needs to be changed is to remove the code in the interrupt shell that  re-enables IRQ interrupts. The macros will most likely be needed - they  usually just contain code to perform an interrupt acknowledgement to the  hardware allowing the next pending interrupt to be latched.




In order to remove the overhead, you can remove the Nested interrupts  in TCT_Interrupt_Context_Save & Restore. For instance in  TCT_Interrupt_Context_Save, instead of checking if it is a nested  interrupt or not, we will jump to TCT_Normal_Save.

For both of these methods, FIQs can still "nest" on IRQs - the reason  for this is that FIQ interrupts aren't disabled by the ARM processor  when an IRQ interrupt is accepted. An FIQ interrupt can still be latched  during this entire interrupt sequence.