I'm used to Modelsim for simulation. I'm wondering if Mentor has tools for STA like PrimeTime that would take netlist, SDF and timing constraints for analysis.
I've had a quick glance at their website and I've found ICX /TAU which is more board level analysis.
Thanks for anwers.
Perhaps you can use Time-it for it (takes your SPEF file from PEX, the Verilog netlist and the Synopsys timing library to write a SDF file for ModelSim).
However the last update of this tool was in 2005.
you might want to try Pyxis Static Timer, which is the built in Timer of the Pyxis Custom Router.
Not sure if this meats your requirements but probably worth a try.