[1] Reduce the number of resistors in the design by reducing parasitic via resistors. If a large number of resistors are being extracted from Via's in the design, try a more aggressive via reduction setting in the following SVRF statement:

**PEX REDUCE VIA RESISTANCE **[*layer1 layer2*]

{**STANDARD **[COUNT *max*] [DISTANCE *value*] |

** FLEXIBLE **[DISTANCE *value*] [MINSTEP *value*] |

** MINIMUM |**

** OFF**}

OFF is least aggressive. FLEXIBLE is more aggressive. STANDARD can be made most aggressive

[2] Reduce parasitic elements further by using the Pex Reduce Ticer reduction statement. Sweep the TICER frequency setting from zero Hz to a reasonably high value to find a frequency at which TICER reduction of parasitic elements is maximum.

[3] Reduce parasitic resistor counts even further using PEX REDUCE MINRES COMBINE ** threshold**. This combines all unprotected resistors of resistance less than the specified

**into a neighboring larger resistor, and is applied before PEX REDUCE TICER. Associated capacitors are split equally between two neighboring resistors. A node is protected if it connects more than two resistors, or connects to a port or a device pin.**

*threshold*[4] Consult this TechNote: MG579191 on supportnet.mentor.com

What settings are most aggressive in reducing parasitics in Calibre xRC netlists?

[5] If your circuit simulator allows this, specify a minimum value for resistors to be simulated. For example, in the simulation testbench input file under 'simulatorOptions' include a parameter called 'minr'. You can possibly set this to 0.1 ohm to discard the values smaller than the specified value.

For example: simulatorOptions options reltol=1e-6 vabstol=1e-6 iabstol=1e-6 temp=25 tnom=25 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 digits=5 cols=80 pivrel=1e-3 ckptclock=1800 sensfile="../psf/sens.output" checklimitdest=psf **minr=0.1 **

[6] Change the device GATE resistance

Step Gmin through several orders of magnitude.

[7] Searching google for convergence problems turns up these helpful documents:

[7.1] Solving Spice Convergence Problems

[7.2] Step-by-Step procedures help you solve Spice convergence problems

[7.3] Correcting Convergence Problems

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