Q1: Is there a way to save the settings for highlighted traces and recall it as preset?
There is currently no way to do this. Your best alternative is to use the ‘Color by Net’ functionality which can persist through schemes.
You can also try the ‘Highlight Entire Routed Net’ option within Smart Utilities, or simply creating a User Group within Net Explorer to quickly access & highlight those nets.
Q2: Does ‘Show Net Names on Traces’ display the names of planes as well?
At this time, plane names are not displayed. This is being considered for a future release – vote for this enhancement as Mentor Idea D14622.
Q3: Will Global Transparency and Dim Mode be available in Xpedition 3D? We want to view a single differential pair leaving a padstack in isolation.
This is a great idea that hasn’t been submitted on Mentor Ideas yet.
Q4: Will backdrilled vias appear without the via stubs in Xpedition 3D?
This is planned for VX.2 – check the BSD Release Schedule.
Q5: What keyboard modifier do you use when routing only one trace in a differential pair?
Use the ‘Ctrl’ key instead of ‘Alt’ – this has been changed for consistency.
Q6: Can you still customize toolbars?
You can easily add or remove buttons using the dropdown menu at the end of the toolbar. You can still move toolbars around and even create your own custom ones from View > Toolbars > Customize.
Q7: If I push a part from the top layer to the bottom layer, and that part is in a Planning Group, will it flip all components in the Planning Group?
No, it will only push that individual part. If you want to move all placed components over, you need to right-mouse click the Group Outline and select ‘Push’. If you want to do this at the Planning Group level, use the ‘Placement Settings’ dialog within Component Explorer.
Q8: If a component is fixed on the board (e.g. a connector at the board edge), can I still place out of the Planning Group bubble?
In this case, the connector has already been instantiated on the board and is no longer part of the Planning Group. Therefore, you cannot place the connector out of the Planning Group bubble. The rest of the components in the group can be placed as usual.
Side note: you cannot move or manipulate a Group Outline (the outline which goes around instantiated parts) if the group contains a fixed or locked component. You must unfix or unlock that component first.
Q9: What happens to parts that are added to the design during an ECO – will they appear in Planning Groups?
You will need to add the ‘Cluster’ property on the part in the schematic, or manually place them into a Planning Group through the Component Explorer window.
Q10: What happens to parts that don’t have a ‘Cluster’ property (i.e. are not in any Planning Group)? Are they distributed automatically?
They will appear in Component Explorer under the ‘board name’ category at the top. Click this group to list all the remaining components.
Q11: Do conductive shapes that are locked on surface layers stay locked? Previously you needed a .VBS script to unlock them.
This issue appeared in EE 2007 and was fixed for the 7.9 release. You can find the script and SupportNet documentation below.
Q12: Can you hatch a conductive shape?
Hatching is supported through Plane Classes and not available on other shapes. There is a suggested enhancement to extend hatching to all Draw Objects – view this on Mentor Idea D7131.
Q13: Is there any control over the spacing & size of words for ‘Display Net Names on Traces’?
Not yet – this is being considered for a future release.
Q14: Are Rule Areas recognized by Valor NPI – i.e. can they become part of the ERF rule set?
Rule Areas are recognized by Valor NPI and can be visualized within the tool. However, they do not automatically become part of the ERF Rule Set. You will need to manually create an Area Map, assign the attribute .area_name to it, and assign specific ERF rules for that area.
Please check for the pending TechNote MG589955 on SupportNet.
Q15: For Display Control’s ‘Color by Net’ option, it would be helpful to have a way to shift-click several nets in the list so I could color a whole bank in one command. Currently, I have to manually click ADDR1, ADDR2, ADDR3, etc.
This is being considered for a future release – view the details on Mentor Idea D10679.
Q16: Is it an extra license to import Gerber into Xpedition to view?
Yes – you need a FabLink license to view Gerber files through File > Import.
Q17: Despite setting any-angle pad entry in Editor Control, I keep receiving many ‘Pad Entry’ violations in Review Hazards - how do I keep this from reporting an overwhelming number of violations?
There are several possible causes; we would need to see the design in question. Please open a Service Request on SupportNet for help with troubleshooting.
Q18: How can I add easily add a vertex-arrow shape as documentation in Xpedition?
From the Dimension toolbar, use the ‘Place a Radius or Diameter Dimension’ command.
You can also use the new Geometric Dimension commands – enable this from Setup > Dimension Parameters > Method > Geometric. Then use the ‘Place a Leader Note’ command from the Dimension toolbar. This requires a FabLink license.
Q19: Are traces and vias available for selection & cross-probing in Xpedition 3D?
At this time, you cannot select individual traces and vias in 3D view.
Q20: What is the availability of PartQuest for Xpedition, and what is the pricing?
PartQuest will be available for Xpedition later this year – it currently supports PADS VX.1. Find out more on the PartQuest home page.
Q21: How is Part Ref Des generated based on component outline? It seems to size inconsistently on certain parts.
Part Ref Des is generated based off Placement Outline – it takes into account both the length and width of the outline and automatically resizes the font so the Ref Des can fit inside. The longest dimension will set the direction of the text.
For outlines that are heavily scaled in one dimension, the font may increase a few points until it slightly eclipses the outline. For example, if you create a long, thin rectangular outline the font may grow until it is slightly larger than the rectangle. This shouldn’t impair readability but you can tweak the outline if it is causing an issue.
Q22: What happens if I have overlapping Rule Areas with conflicting schemes?
The scheme from the smaller Rule Area will be used. This is true whether the Rule Areas are on the same layer or different layers.
Q23: If you change the scheme for a Rule Area that already has routing in it, will it update the trace widths and clearances?
No, all pre-existing traces and vias stay the same. You can use Analysis > DRC Visualization to view trace & via violations resulting from updated clearances. Most of these can be fixed with RMB > Repair Selected.
Differential Pairs will not automatically update after a rule change. You can use RMB > Width to update trace width – spacing can be adjusted by pushing and shoving the traces.
Q24: How to tie mounting holes to something other than (Net0)?
You first need to check that the mounting hole is plated and contains at least one defined pad (mount side, internal, or opposite side). This can be done through Setup > Libraries > Padstack Editor.
Once the mounting hole is defined correctly, you should be able the net from RMB > Padstack Properties > Net Name.
Q25: Difference between Locked, Fixed, and Semi-Fixed?
Locked objects cannot be moved unless the object is unlocked. Fixed objects can be moved by the user if ‘Move Fixed Objects with Warning’ is enabled from Editor Control. Semi-fixed objects can be moved by dragging on them but not for push & shove.
Q26: Does xPCB Layout support multicore processors?
Different functions within the application do run on different threads – for example, the graphics on one thread, the routing engine on another thread, and various "watchers" on other threads.
However, this does not create a significant performance advantage because key algorithms within the applications are not coded for parallel computing. So while having multiple CPU cores does improve overall system performance, it does not appreciably improve individual application performance.
Q27: Does Sketch Router include ground and stitching vias in the routes?
This is planned for a future release – check the BSD Release Schedule.
Q28: Can I change what the Action Keys (i.e. the ‘Function’ keys) do in xPCB Layout?
Yes – you can edit the ‘KeyBindings.vbs’ file in SDD_HOME with whatever keyboard accelerators you want. Since this file is loaded after Xpedition is configured, it will override the default Action Key commands.
Q29: How can I distribute parts in an array outside the board outline?
You can ‘Shift’ select the parts in Component Explorer, right-mouse click and select ‘Distribute’.
Additionally, if you want control over the number of columns in the array you can use the Keyin Command “pr -dist -c=<columns> <RefDesList>”
Q30: How does transparency appear in a generated PDF?
Unfortunately, transparency is not reflected in the PDF at this point. The case exists with Engineering (DR 380946).